The latest technology! Intel announced 3D chip technology, logic unit, back power supply of future foundry technology at IFS Direct Connect conference!

Recently an exclusive interview ahead of an invitation-only event in SAN Jose, Intel outlined the new chip technologies it will offer its contract customers by sharing a glimpse of its future data center processors. These advancements include denser logic and 3D stacked chips with 16 times more internal connectivity, and they will be one of the first high-end technologies the company will share with chip architects from other companies.

These new technologies will be the culmination of a years-long transformation at Intel. The processor maker is transitioning from a company that only makes its own chips to a foundry that makes chips for other companies and sees its own product team as just another customer. The IFS Direct Connect event in SAN Jose was designed as a coming-out party for the new business model.

Intel internally plans to use this combination of technologies in a server CPU code-named Clearwater Forest. The company think that the product as a system-on-chip with hundreds of billions of transistors, is an example of the goal other customers of its foundry business can achieve. "Our goal is to get the computation to the best performance per watt we can achieve," said Eric Fetzer, director of data center technology and discovery at Intel. That means using the company's most advanced manufacturing technology- Intel 18A. "However, if we apply the technology to the whole system, there are other potential problems, and some parts of the system are not necessarily as scalable as others," he added. Logic usually scales well from generation to generation according to Moore's Law." Other features do not. For example, SRAM (the CPU's cache) has been lagging behind the logic. The I/O circuits that connect the processor to the rest part of the computer are even more backward.

Faced with these realities, as all leading processor manufacturers now face, Intel broke Clearwater Forest's systems down to their core functions, picked the most suitable technology to build each function, and stitched them back together using a new set of technologies. The result is that the CPU architecture can be scaled up to as many as 300 billion transistors.

In Clearwater Forest, billions of transistors are divided into three different types of silicon ics, called bare chips or small chips, which are interconnected and packaged together. At the heart of the system are small chips with up to 12 processor cores built using the Intel 18A process. The small chips are stacked in 3D on top of three "base chips" built using Intel 3, this process is manufacturing computing core of the Sierra Forest CPU launched this year. The CPU's main cache, voltage regulator, and internal network will be installed on the base chip. Senior Principal Engineer Pushkar Ranade said: "Stacking improves latency between compute and memory by shortening jump, while enabling a larger cache."

Finally, the CPU's I/O system will be located on two chips built using Intel 7, by 2025, the chip will be a full four generations behind the company's most advanced processes. In fact, these small chips are essentially the same as those small chips in Sierra Forest and Granite Rapids cpus, enable to reduce the development expenses.

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